54 PWMCONF_register.sr = 0x00050480;
62 digitalWrite(
_pinCS, state);
106 SPI.beginTransaction(SPISettings(
spi_speed, MSBFIRST, SPI_MODE3));
108 SPI.transfer(addressByte & 0xFF);
109 SPI.transfer16(0x0000);
110 SPI.transfer16(0x0000);
115 SPI.transfer16(0x0000);
116 SPI.transfer16(0x0000);
117 SPI.transfer(0x0000);
126 SPI.transfer16(0x0000);
127 SPI.transfer16(0x0000);
128 SPI.transfer(0x0000);
134 out = SPI.transfer(0x00);
136 out |= SPI.transfer(0x00);
138 out |= SPI.transfer(0x00);
140 out |= SPI.transfer(0x00);
142 SPI.endTransaction();
166 SPI.beginTransaction(SPISettings(
spi_speed, MSBFIRST, SPI_MODE3));
169 SPI.transfer16((config>>16) & 0xFFFF);
170 SPI.transfer16(config & 0xFFFF);
175 SPI.transfer16(0x0000);
176 SPI.transfer16(0x0000);
177 SPI.transfer(0x0000);
181 SPI.endTransaction();
193 GCONF(GCONF_register.sr);
210 GCONF(GCONF_register.sr);
215 THIGH(THIGH_register.sr);
217 VDCMIN(VDCMIN_register.sr);
220 DCCTRL(DCCTRL_register.sr);
239 TCOOLTHRS_register.sr = input;
240 write(TCOOLTHRS_register.address, TCOOLTHRS_register.sr);
246 THIGH_register.sr = input;
247 write(THIGH_register.address, THIGH_register.sr);
252 return read(XDIRECT_register.address);
255 XDIRECT_register.sr = input;
256 write(XDIRECT_register.address, XDIRECT_register.sr);
266 VDCMIN_register.sr = input;
267 write(VDCMIN_register.address, VDCMIN_register.sr);
272 DCCTRL_register.sr = input;
273 write(DCCTRL_register.address, DCCTRL_register.sr);
276 DCCTRL_register.dc_time = input;
277 write(DCCTRL_register.address, DCCTRL_register.sr);
280 DCCTRL_register.dc_sg = input;
281 write(DCCTRL_register.address, DCCTRL_register.sr);
285 return read(DCCTRL_register.address);
304 ENCM_CTRL_register.sr = input;
305 write(ENCM_CTRL_register.address, ENCM_CTRL_register.sr);
317 case 32:
sedn(0b00);
break;
318 case 8:
sedn(0b01);
break;
319 case 2:
sedn(0b10);
break;
320 case 1:
sedn(0b11);
break;
325 case 0b00:
return 32;